(a) Field of the Invention
The present invention relates to a semiconductor device with a metal line, and a method of forming the same.
(b) Description of the Related Art
FIG. 1A and FIG. 1B are cross-sectional views showing a conventional method of forming a metal line in a semiconductor device.
Firstly, as shown in FIG. 1A, an inter-metal dielectric (IMD) layer 102 is deposited on a semiconductor substrate 101 including a predetermined pattern, and then a via hole (not shown) is formed after performing a chemical mechanical planarization (CMP) process for the IMD layer. Subsequently, a barrier metal layer is deposited on an inside of the via hole, and then a tungsten plug is formed by performing a CMP process after filling the via hole with a refractory metal, such as tungsten 103.
However, when a CMP process is performed on an IMD layer, a dishing phenomenon may occur in a region that is not planarized and has a low pattern density. Therefore, residual tungsten in the region where the dishing phenomenon occurs may not be completely removed in the subsequent process. Such a dishing phenomenon may deteriorate the reliability and yield of a semiconductor device because it may cause a power failure or a bridge between metal lines in a semiconductor device.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form part of the prior art with respect to the present invention.